There’s a new CPU maker.

Summary: ARM AGI announcement (ARM Everywhere)

A new physical CPU product — referred to in the presentation subtitles as “ARM AGI” — was revealed by ARM at their “ARM Everywhere” event. This is noteworthy because ARM historically licenses CPU IP rather than selling finished CPUs.

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Key hardware specs (from subtitles)

• Up to 136 ARM Neoverse V3 cores
• ~2 MB L2 cache per core (subtitle text)
• TSMC 3 nm process node
• Fixed top clock around 3.6 GHz (ARM’s approach favors consistent clocks over large single-core boosts)
• 12‑channel DDR5 memory controller (subtitles claim ~6 GB/s per core of consistent per‑core bandwidth)
• 96 PCIe Gen6 lanes and CXL 3.0 support (for large shared memory pools over PCIe)
• Power: ~300 W per AGI CPU (subtitle)
• Node configurations shown with up to two CPUs on a single motherboard

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Rack-scale and efficiency claims

• OCP air‑cooled design: 36 kW rack fitting 30 two‑node systems (subtitle count: 8,160 cores)
• OCP liquid‑cooled design: 200 kW rack claimed to host up to 45,696 cores and over a petabyte of RAM while using about half the rack’s power budget
• ARM positions the AGI CPU at roughly 2× performance-per-watt versus flagship x86 (as presented in slides/demos)
• Efficiency advantages cited:
  • fewer legacy features
  • fewer chiplets (lower memory latency)
  • strong instructions-per-clock (IPC)
  • “no silicon wasted” design approach
  • predictable, consistent power draw (no large dynamic boosting), which helps data centers plan around steady power/thermal budgets instead of peak buffers

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AI positioning and workload analysis

• ARM argues CPUs remain critical as coordinators for AI workloads; if CPUs can’t keep up with fast token requests from AI accelerators, the accelerators can sit idle
• Denser, more efficient CPUs at the head node can increase cores-per-gigawatt in AI deployments (subtitle claims up to ~4× improvement in the head node)
• The product is pitched to enable tighter integration with accelerator racks and reduce coordinator bottlenecks

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Software and demos

• Emphasis on developer support and ease of porting software to ARM
• Live demo on the show floor: a real server encoding a 1080p video (H.264 → HEVC‑like) while simultaneously running computer vision on the same CPU — used to highlight consolidation and throughput
• Many demos focused on software portability and real‑world consolidation rather than synthetic or flashy visual benchmarks

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Business model and positioning

• ARM is offering multiple deployment/licensing paths:

  • traditional IP licensing
  • compute subsystem licensing
  • selling physical CPUs Customers can choose or mix these options.

• ARM described this first CPU as a “safe first attempt” and announced a follow-up CPU planned for next year (an iterative hardware roadmap)

• This move can put ARM in potential competition with some of its licensees, but ARM frames it as meeting customer demand; hardware partners such as Super Micro were involved in the designs shown

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Notes and caveats

Subtitles were auto-generated and contain minor transcription errors (for example, H65 likely meant HEVC/H.265, “3nmter” meant 3 nm, etc.). Numbers and quotes above are taken from the subtitle text. The presentation was an ARM‑sponsored event; claims about density and perf/W come from ARM’s demos and slides rather than independent benchmarking.

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Main speakers / sources referenced

• ARM (company / ARM Everywhere event) — primary source of product and claims
• Event video narrator/presenter (style and channel references indicated in the subtitles)
• Nick (“from the lab”) — hands‑on/demo segment
• ARM on‑stage representatives and sales (a “Will” was mentioned)
• Hardware partners (e.g., Super Micro)
• TSMC (foundry mentioned for the 3 nm process)