KiCad 9 ESP32-C3 Mini PCB Design | Full Schematic Walkthrough

Summary

The video is a schematic-design tutorial for a compact ESP32-C3 mini evaluation board using KiCad. It focuses on organizing the project and explaining the purpose of the circuit blocks and components. PCB layout is left for a follow-up video.

KiCad project setup

The tutorial briefly tours KiCad’s schematic and PCB editors, symbol and footprint tools, Gerber viewer, calculators, and library and plugin manager.

It demonstrates creating a project and using hierarchical sheets to divide the design into functional blocks. Descriptive sheet names and clear labels or frames around circuit sections are recommended to improve readability and debugging.

Circuit design walkthrough

• USB-C input: A 16-pin USB 2.0 connector provides power and data. The tutorial discusses VBUS, CC, USB data, ground, and shield connections, and combines the duplicated D+ and D− pins to support reversible cable orientation.
• USB protection and filtering: A USBLC6 low-capacitance ESD protection device is added to the data lines, along with an ESD diode on VBUS. Two capacitors and a 0 Ω series link form a flexible input filter; the link could later be replaced by a ferrite bead or resistor.
• 3.3 V supply: An AP2112-series LDO is used with input and output capacitors. The presenter favors an LDO over a switching regulator for simplicity and lower noise, while noting the efficiency trade-off.
• ESP32 module and decoupling: An ESP32-C3-WROOM-02 module is paired with local 4.7 µF and 100 nF capacitors. The module’s internal 40 MHz clock is noted, and a separate 32.768 kHz crystal circuit is added for the RTC domain.
• Clock circuit: The low-speed crystal circuit includes placeholder load-capacitor values to be finalized based on the crystal and PCB requirements, plus a feedback resistor. Optional 0 Ω series links are omitted for simplicity.
• Reset and boot: An EN pull-up and reset button are added, along with an RC network to reduce switch-related noise. For boot strapping, the tutorial describes IO9 as normally pulled high and grounded by a button to enter download mode, while IO2 and IO8 are held high.
• USB data connection: The protected D+ and D− lines connect to the ESP32’s native USB pins, IO18 and IO19. The presenter notes catching and correcting a D+/D− mix-up and emphasizes checking the datasheet.
• Development headers: Most GPIOs, 3.3 V, and ground are brought out to two 8-pin, 2.54 mm headers. IO2 and IO8 are reserved for their boot-strapping roles.

Key takeaways and caveats

The completed schematic is presented as electrically organized and ready for PCB layout, but the video does not cover component placement or routing. The announced next part will address board layers, placement, power routing, grounding, and USB differential-pair routing.

• USB-C CC resistors: The narration calls the CC resistors “pull-ups.” A USB-C power sink normally uses 5.1 kΩ pull-down Rd resistors from CC1 and CC2 to ground. Check the actual schematic before building.
• Boot-pin inconsistency: The opening overview mentions a boot button on GPIO8, while the detailed boot section identifies IO9 as the button-controlled download-mode pin and holds IO8 high. Check the detailed wiring against the module datasheet.
• VBUS ESD diode: The presenter acknowledges that the selected diode’s stated clamp level is above the LDO’s maximum input rating, describing this protection choice as an acceptable simplification for the evaluation board.

Source

The video features a single narrator from the PajoPCB channel, using KiCad libraries and component datasheets as references.