Combinational Redstone Devices - LRR #6

Summary of Technological Concepts / Devices (Combinational Logic in Minecraft Redstone)

The video is part of “Logical Redstone Reloaded (LRR) #6”, focused on building a “toolbox” of combinational logic devices—circuits whose outputs depend only on current inputs (no memory, no internal state, independent of time). It frames sequential circuits as a later topic.

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1) Magnitude Comparator (A vs B)

Goal

Given two binary numbers A and B, output three bits indicating whether:

• A > B
• A = B
• A < B

Equality approach (sub-circuit idea)

Use XOR gates per bit:

• XOR outputs 0 when bits match
• XOR outputs 1 when bits differ Then combine XOR results so any mismatch turns equality off.

Greater-than logic (algorithmic approach)

Compare from the most significant bit downward:

• If the first differing bit is A=1 and B=0, then A > B
• If A=0 and B=1, then A < B
• If bits match, continue to the next pair

Presented optimized/compressed design

• Mentions a clever circuit by ikandu and sloime, using a repurposed carry-cancel-style process.
• Produces:
  • A > B
  • A = B (included directly—so a separate equality checker isn’t needed)
  • A < B derived via logic from the first two outputs using a NOR approach
• Efficiency claim: comparator outputs in ~3 ticks.
• Alternative method: compare using a subtractor (e.g., check if A−B = 0, or greater-than), but it’s typically larger/slower; the comparator is smaller and faster.

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2) Encoder

Goal

Take one active input (from multiple options) and output its binary code.

Example: 4 inputs → 3-bit encoding

• Inputs labeled A, B, C, D
• Example mapping used:
  • A → 1, B → 2, C → 3, D → 4
• Demonstrates different hardware layout styles, including:
  • Horizontal-to-horizontal (classic)
  • Horizontal-to-vertical using structures like glass towers
  • Designs using extra alignment layers
  • A vertical-to-vertical spiral-based approach
  • Vertical routing using 2x2 barrels (noted as stackable if oriented correctly)

Important constraint

Encoders assume exactly one input is on at a time. If multiple inputs accidentally activate, behavior becomes “weird.”

Priority encoder add-on

• Adds a front circuit that enforces the “one input” rule by selecting an example such as the rightmost active input.
• This enhanced version is called a priority encoder.

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3) Decoder

Goal

Take a binary encoding and output a corresponding one-hot signal.

Core design principle

Each output acts like an AND-detection of the correct bit pattern:

• Use inverted inputs (via NOT gates) wherever the target bit is 0
• Use repeaters to prevent false positives when incorrect bits are present
• Combine with an OR into the final output signal

General example

Detect a sequence such as 1 0 1:

• AND the conditions for the correct bits
• Add repeater gating so the output turns on iff the full pattern matches

Emphasized “best/typical” build style

Uses a repeated glass tower per output method:

• “Torch on” where input bits should be 1
• “Repeater where bits should be 0**
• OR-combine into the output torch

Benefits mentioned:

• Can power from different ends
• Can decode on multiple sides

Alternative layouts shown

• Spiral-based vertical decoding
• Horizontal-to-horizontal with block-side wiring patterns

Practical warning:

• Space issues with long repeater chains; suggests widening gaps (e.g., 2-wide output gaps) to avoid congestion.

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4) Using Encoders/Decoders for Data Transformation

Data transfer / compression

Demonstrates moving a value using only ~3 wires:

• Encode a value into a 3-bit representation
• Decode it elsewhere

Constraint:

• Works only with one active input at a time (not multiple simultaneous values).

Brute-force function implementation

General method:

1. Use a decoder to detect which input case is active.
2. Use an encoder to output the desired result for that case.

Example: “plus one” for 4-bit numbers:

• Detect all 16 input possibilities
• For each detected case, output the next number (e.g., 5 → 6, 3 → 4)

Downside:

• Complexity scales rapidly.
• An 8-bit→8-bit brute-force approach would require:
  • a 256-line decoder and 256-line encoder

Recommendation:

• Use logic gates / Boolean algebra first instead of brute force where possible.

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5) Multiplexer (MUX) and Demultiplexer (DEMUX)

Multiplexer (MUX)

A selector that routes one of several inputs to a single output.

Example: 2 inputs + 1 selector bit:

• selector=0 → passes left input
• selector=1 → passes right input

Minecraft note:

• Recommends using comparators for MUXes rather than AND-gate diagrams.

Generalization:

• For N inputs, you need log2(N) selector bits.
• Example: 4 inputs requires 2 selector bits, implemented via decoding selector combinations.

Demultiplexer (DEMUX)

Reverse routing: one input is sent to one of multiple outputs.

• Described like “train tracks.”
• Implemented via the same decoder-like selection technique used for MUX construction.

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6) Redcoder (Signal Strength → Lamp Index)

Goal

Convert a Redstone signal strength value into a corresponding lamp output (similar to encoding).

Example behavior

• Input 7 lights lamp #7
• Input 15 lights lamp #15

Working principle (clever “special case” column)

Splits the input into two lines:

• Top line: starts at input−1 and decays
• Bottom line: starts at input and decays

The special column occurs where:

• bottom is powered
• top is not That mismatch is detected conceptually using XOR-like behavior per column (special column outputs 1, others output 0).

Also mentioned:

• Vertical variants
• An example use in a Flappy Bird-style game

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7) Hexadecimal/Binary Converters (Brief)

• References two designs previously covered:
  • Hex → Binary
  • Binary → Hex
• Claim: complete in ~2 ticks.

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Main Speakers / Sources

• Primary speaker: the video creator (associated with Logical Redstone Reloaded (LRR))
• Referenced source circuits/designers: ikandu and sloime (for the optimized A > B comparator circuit)