Pipeline & Paralelisme

Technological concepts covered (CPU pipeline + hazards)

Core problem

• Clock speed can’t be increased indefinitely due to heat and physical limits.
• At the same time, real workloads—such as 3D games and AI—need more computation and process more data.

Pipeline architecture (assembly-line model)

A pipeline improves performance by overlapping instruction stages, similar to an assembly line.

• Throughput increases: more work is completed per unit time.
• Latency stays roughly the same: the time for a single instruction to finish end-to-end doesn’t significantly change.

The summary describes a 5-stage pipeline:

1. Fetch (get instructions)
2. Decode (translate)
3. Execute (perform calculation)
4. Memory access (load/store)
5. Write back (save results)

Idealized result: a perfect pipeline can improve throughput up to ~5×.

Pipeline hazards (“traffic jams”)

Pipelines can stall or run inefficiently due to three main hazard types:

1. Structural hazards Multiple instructions compete for the same hardware resource.

2. Data hazards An instruction needs data that hasn’t been produced yet by a previous instruction.

3. Control hazards Branches (e.g., “if A then B”) create uncertainty about which instruction comes next.

Branch prediction

To reduce control-hazard delays, CPUs use branch prediction:

• Correct prediction → the pipeline stays full.
• Wrong prediction → the CPU discards the guess and flushes/restarts work, paying a penalty.

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Scaling up with parallelism (processor taxonomy + SIMD)

Parallel computing idea

If one “pipeline factory” isn’t enough, performance can be scaled using more parallel architectures.

Flynn’s taxonomy (instruction/data stream classification)

This taxonomy categorizes systems by how they process instructions and data:

• Example: SISD (Single Instruction, Single Data) in older systems
• Example: MIMD (Multiple Instruction, Multiple Data) in modern multicore designs

SIMD (Single Instruction, Multiple Data)

SIMD applies the same instruction simultaneously across thousands of data points.

It’s presented as “secret sauce” for:

• 3D graphics rendering (image/matrix processing)
• Machine learning training (large parallel numerical computation)

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CPU vs GPU: why they excel at different workloads

CPU analogy

A CPU is likened to a small team of “genius managers,” optimized for:

• complex, often sequential logic
• deep pipelining

GPU analogy

A GPU is likened to thousands of “field workers,” optimized for:

• large-scale parallel, predictable tasks (e.g., pixel counting)

Conclusion

• GPUs are essential for visual and AI workloads.
• CPUs still play a major role in overall computing.

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CPU parallelism techniques (within a core)

• Superscalar architecture: execute more than one instruction per clock cycle.
• Out-of-order execution: reorder instruction execution to improve efficiency when possible.
• Hyper-threading: present one physical core as multiple logical threads to run tasks more simultaneously.

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Real-world impact (products/services mentioned)

The summary argues these techniques enable:

• Smooth 3D game graphics
• Advanced AI
• Cloud computing
• Big data analytics

Overall emphasis: modern hardware performs massive instruction optimization and parallel execution “behind the scenes.”

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Main speakers / sources

• No specific named speaker or external source is identified in the subtitles.
• The content appears to be delivered by a single presenter.