반도체란 무엇일까? 반도체의 기본원리와 8대 공정

Scientific concepts & nature phenomena presented

Semiconductors vs conductors/insulators

• Conductors (e.g., metals like iron, copper) allow electric current because they have free electrons.
• Insulators (e.g., paper, rubber) do not conduct because they lack free electrons.
• Semiconductors have conductivity that can be engineered—made conductive by artificially manipulating an insulator.

Atomic structure and valence electrons

• Matter is made of atoms with a nucleus and electrons.
• Stability depends on the number of outermost (valence) electrons.
  • Example: Silicon has 4 valence electrons, enabling shared bonding in the crystal lattice.

Band/charge carrier idea via doping (electron vs hole conduction)

Conductivity is enabled by introducing mobile charge carriers through two main approaches:

• Add electrons (donor doping)

  • Example: inject phosphorus (5 outer electrons) → leaves one “extra” electron that can move.
  • Produces an n-type semiconductor (commonly noted as n = negative).

• Create holes (acceptor doping)

  • Example: add boron (3 outer electrons) → creates a missing electron site (hole).
  • Holes behave like positively charged carriers.
  • Produces a p-type semiconductor (noted as p-type = positive behavior; subtitles mention “b-type”).

p–n junction physics (diode behavior)

When p-type and n-type materials contact:

• Electrons move toward holes and recombine, forming a depletion region.
• With no forward bias, current is blocked.
• With the correct voltage polarity, electrons/holes are driven across the junction and current flows.

This behavior creates a diode:

• Allows current in one direction.
• Used to convert AC → DC (e.g., in phone chargers).

LED (light-emitting diode)

• When electrons recombine across the junction, emitted light appears due to an energy difference.

Transistor principle (switching)

• A thin middle region forms the conceptual basis of a transistor.
• By increasing voltage, a circuit can switch current on/off—switching is the ability to control current flow.

MOSFET structure and control

MOSFET as a field-effect switch

• A gate electrode applies voltage.
• An insulating layer prevents gate current leakage.
• A conductive path forms when the gate voltage attracts carriers:
  • Conceptually described as forming an n-type (NN) path when electrons gather.
  • Or a p-type (PP) path when holes gather.
  • Subtitles reference “n-MOSFET” vs “b-type MOSFET”.

Common MOSFET forms mentioned

• FinFET for smaller products (e.g., CPUs, smartphone APs).
• A “finger-type” / flat form factor is mentioned for larger devices (e.g., image sensors, displays).
• Notes also mention MOSFET evolution to reduce leakage current.

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Semiconductor manufacturing methodology (8 stages) + key processes

The subtitles describe semiconductor manufacturing as commonly explained in eight stages. Each stage below includes the techniques and physics/chemistry mentioned.

1) Wafer manufacturing

• Start with sand, melted at about ~1800°C, then purify impurities.
• Add boron to create p-type starting silicon.
• Use a seed crystal to grow silicon ingots (seed-based crystallization).
• Cut into wafers and flatten surfaces (diamond-wire cutting plus mechanical/chemical planarization).

2) Oxidation

• Introduce oxygen and heat (about ~1000°C mentioned).
• Oxygen forms silicon dioxide (SiO₂) on the wafer surface.

3) Photolithography

• Coat the wafer with a photosensitive material.
• Use a photomask and ultraviolet light to project the circuit pattern.
• Develop the wafer so exposed/unexposed regions create the pattern used for etching.

4) Etching

• Remove unnecessary material using etching gases and plasma/chemical reactions.
• Example (oxide removal): carbon-based and oxygen-containing gases in plasma chemically corrode and physically peel oxide.

5) Lithography & ion implantation

• Deposition builds required thin layers:
  • Create gate oxide (SiO₂) and gate silicon using plasma/thermal reactions.
• Ion implantation:
  • Inject ions to create n-type regions (described as providing “one more electron”).
  • A magnet helps select ion mass/charge.
• Heat treatment (light mentioned) helps dopants bond properly.
• The gate region and source/drain regions are engineered to form an n-MOSFET-type structure (as described).

6) Metal wiring

• Create an insulating oxide layer for wiring.
• Open vias using photolithography/etching.
• Add a diffusion barrier to prevent copper diffusion into silicon.
• Improve adhesion with a thin copper seed layer.
• Copper electroplating:
  • Wafer as the negative electrode, copper source as the positive electrode in a copper sulfate solution.
  • Copper deposits onto the surface as copper atoms.
• Planarization: remove excess copper to achieve flat wiring (grinding/rotation mentioned).
• Interconnect MOSFET terminals to form circuits (e.g., logic circuits).

7) Testing

• Inspect the semiconductor for correct fabrication and defects.

8) Packaging

• Dice the wafer into individual components and mount them into final products.

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Logic concept mentioned (NOT gate example)

• Logic gates depend on how transistors are connected.
• A NOT gate outputs the opposite of its input:
  • If input is “true” (high voltage), output is “false” (low voltage), and vice versa.
• Subtitles provide a simplified explanation using:
  • p-type vs n-type conduction paths (p-shape vs n-shape behavior),
  • which results in inversion of the input/output voltage levels.

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Researchers or sources featured

• Book: Understanding the Semiconductor Industry System in Just One Day
  • Video created using excerpts from this book; no specific author named in the subtitles.