Home made GPU escalated quickly

Overview

• The creator builds a “GPU-like” homemade ultra-cluster using RISC-V–style MCUs (WCH CH570 class) with a massive core count approach: effectively one MCU per pixel at a reduced-resolution target (QVGA = 2^16 pixels ⇒ 65,536 MCUs for the intended full image).

Hardware / Product Concept Details

Cluster architecture

• Target scale: 65,536 MCUs (pixel-per-MCU concept).
• Planned hierarchical organization:
  • Blades composed of 1,024 MCUs, arranged as:
    • 32 MCU rows × 32 MCUs per row
  • Each blade uses row controllers to manage communication to the MCU row.
  • Expansion plan:
    • Start with 16 blades
    • Scale to 64 and 128 blades in future versions

MCU choice (WCH CH570)

• Approx. cost: ~13 cents each
• Clock rate: ~100 MHz (per description)
• Mentioned features:
  • Multiplier
  • ~12 KB SRAM
  • Native USB + radio
• Initially intended as an upgrade over a prior CH32V MCU approach.

I/O / communication strategy

• To avoid earlier bus issues, the design uses SPI at the hardware level.
• Proposed “sweet spot”: 32 MCUs per SPI segment
• Row controllers support multiple chip selects (32 per controller), enabling the controller to directly select which client device to talk to.

Power, Thermal, and Physical Packaging

Power estimate becomes the main constraint

• Current draw: ~10 mA per MCU
• Total at scale: ~650 A at 3.3 V, roughly ~2 kW of power
• Thermal reality: ~99.9% becomes heat, making dissipation the hardest part
• European outlet limits referenced: ~3 kW available (used as a boundary condition)

Cooling plan and pivot

• Early thinking: immersion cooling
• Practical issue: container size constraints (acrylic container max ~0.5 m diameter) plus fitting enough “blades.”
• Final decision for v1: air cooling for now
• Immersion cooling not ruled out, but:
  • “Transparent submerged cooling liquids” were discontinued due to “forever chemicals”
  • Sourcing replacements becomes a new quest
  • Pump/cooling hardware cost adds ~$1,000

PCB / Signal Integrity / Manufacturing Constraints

High-density PCB design approach

• Concern: routing and data line crosstalk
• Mitigations:
  • More careful routing/shielding than prior projects
  • Use of Altium to set impedance-related trace properties (trace widths via rules)
  • 6-layer PCB used for the first time in this project
  • Ground on inner layers (2nd and 5th) and ground between signals
  • Staggered signal layers to better surround signals with ground
• The exact technology (e.g., stripline vs CPW hybrid) is unclear, but the goal is:
  • consistent impedance
  • protected routing in a cramped layout

Addressable LEDs per MCU

• Each MCU gets an RGB LED, but not expensive addressable LEDs.
• Chosen LEDs:
  • ~1×1 mm
  • Common anode
  • Separate pins for R/G/B
• The MCU is described as acting as a form of ground/driver (common anode + per-color pins logic).

Manufacturing limits

• Full blade complexity exceeded manufacturer capacity:
  • >10,000 vias
  • ~5,000 components per board
• Resulting change:
  • Split blades across multiple boards
  • Adjusted mechanical/connector choices:
    • Housing fit issues led to compromises
    • Needed interface changes including smaller PCIe connectors

Major Testing, Bugs, and Fixes (Key Analysis / Failure Points)

Clocking problem

• Cost-saving attempt:
  • Generate a 32 MHz clock for all MCUs from the row controller PWM pin (intended to create 8 MHz).
• Observation:
  • The clock signal “disintegrated” at higher speeds
  • SPI lines looked better than the clock signal
• Symptoms:
  • Some MCUs refused to boot
  • Others became non-functional
• Fix approach:
  • Required crystal usage / dead-bug test
  • Use of clock source options:
    • Creator expected bypass/crystal options from prior CH32V knowledge
    • But CH570 series clock section lacked the option
  • Also noted: clock pin max rating ~1.4 V, causing signal chopping
• Outcome:
  • Redesign/test boards with proper crystal footprints
  • Additional redesign cycles consumed weeks

SPI communication mistake and electrical diagnosis

• After finalization, a key bug surfaced: level-to-level SPI didn’t work correctly.
• Oscilloscope finding:
  • On chip select, MOSI voltage halved, implying both devices drove the line simultaneously
• Root cause:
  • MOSI/MISO wiring mistake (the common “RX/TX swapped” trope)
• Fix:
  • Added resistors in series to enable easier “correction” and re-testing
• SPI performance:
  • Up to ~15 Mbps tested maximum
  • At ~7.5 Mbps, glitches appeared but communication stayed stable
  • Beyond 15 Mbps would require overclocking

Firmware programming at scale

• Instead of programming every MCU manually, the creator automated it:
  • OpenOCD invoked by Python to flash/program MCUs
  • Uses a 3D-printed pogo-pin frame/arm compatible with the printer build volume (Bumblebee printers)
  • Home Assistant + Node-RED used to help calibrate printer movements
    • Python automation and “vibe coding” for base control
• Performance and reliability:
  • Tool sometimes missed MCUs
  • Positioning was incrementally adjusted until the full blade consistently programmed

Build/Assembly Notes (v1 Hardware Progress)

Interface test board

• An “interface test board” was used early to validate parts quickly as blade components arrived.

Blade/base hardware assembly

• Base boards manufactured with very fine trace precision (claimed 0.1 mm class)
• Noted blunder:
  • Programming pads ended up under the level-4 MCU
  • Exposed pins on the flatback allowed a wire-attachment workaround
• Assembly:
  • Partial stencils used
  • Still required a lot of hand soldering

Mechanical housing

• Built in Blender
• Housing split and assembled with:
  • threaded rods
  • staggered components
• DC/DC converters placed around the perimeter for cooling, connected with many cables

Software and Future Work Tease

• The creator states that software struggles/failures deserve a separate future video.
• The project “seems to succeed.”
• Next steps include scaling to 32,000 MCUs, with additional parts already waiting.

Reviews / Guides / Tutorials Mentioned

Altium promotion with tutorials

• Mentions a 30-day trial and linked tutorial videos
• Highlights Altium features used for this project:
  • Multi-channel design with repeat/instance management (vs manual cloning)
  • PCB features:
    • Real-time DRC rule tracking
    • Automatic impedance matching
    • Multiple grid types (including polar grids)
    • Trace current rating checks
  • Filtering objects by attributes to speed up large designs
  • Integrated version control and issue tracking for team workflows

Programming/tooling guide concepts

• Practical method for scaling MCU flashing:
  • Python + OpenOCD orchestration
  • Pogo-pin fixtures via 3D printing
  • Calibration via Home Assistant + Node-RED dashboards

Main Speakers / Sources

• Primary speaker: the video creator (unnamed in subtitles)
• Referenced people:
  • Patrick (CTO of WCH): helped with MCU quantity availability and offered 10,000 MCUs free
  • Chad: provided a PCB assembly stencil tip
• Companies/tools credited:
  • Altium (sponsor; development platform/trial/tutorials)
  • WCH (MCU source; CH570 mentioned)
  • OpenOCD, Home Assistant, Node-RED (programming/control tooling)
  • Mentions Intermit Tech / Allnet / Gwindor for procurement logistics