CMOS inverter power simulation | low power design | sky130 | Xschem | EP7:VLSI Project help

Main Ideas

• This episode demonstrates pre-layout power analysis of a CMOS inverter using an Xschem testbench and transient simulation.
• Power is estimated from the current drawn from the VDD supply. The presenter focuses on supply current because current from the input source is usually negligible in this setup.
• The simulator reports a negative current because of its sign convention. The presenter treats the sign as a convention and interprets the result by its magnitude.
• The measured current waveform can include several sources of power consumption:
  • Dynamic power as the output load capacitance charges and discharges.
  • Short-circuit power during input transitions, when the PMOS and NMOS may briefly conduct at the same time.
  • Static or leakage power, which can be present even when the inverter is not switching.
• Integrating the supply current over a transient period captures the current modeled by the simulation during that interval.

Power-Measurement Procedure

1. Prepare the inverter testbench.

   • Use the existing pre-layout inverter simulation setup.
   • Remove the DC analysis configuration, since power is measured during a transient simulation.
   • Restore the minimum-size reference inverter: PMOS size 2 and NMOS size 1.

2. Run a transient simulation.

   • Generate the netlist and simulate the circuit.
   • The input pulse has a period of 20 ns. The example integrates over the second period, from 20 ns to 40 ns, to avoid possible startup effects in the first period.

3. Inspect the relevant waveforms.

   • Plot the current through the VDD branch and the output voltage.
   • Since the supply current is much smaller than the output voltage on the plot’s scale, scale the current waveform to make their timing relationship easier to see.
   • Current drawn from VDD is most apparent while the output load capacitance is charging. During discharge, the NMOS provides a path to ground, so that phase does not draw equivalent new current from VDD.

4. Integrate the supply current over one period.

   • Use the simulator’s transient-measurement integration function on the VDD branch current.
   • Enter the time limits in the simulator’s expected units—for example, 20e-9 and 40e-9.

5. Calculate average power.

   • Multiply the integrated supply current by the supply voltage, then divide by the period:

   [ P_{\text{avg}} = \frac{V_{DD}}{T}\int_{t_0}^{t_0+T} I_{DD}(t)\,dt ]

   • In the example, (V_{DD}=1.8\text{ V}). The negative reported current reflects the simulator’s sign convention, so the presenter interprets power using its magnitude.

Power-Reduction Lessons

• Reduce switching activity. A design or architecture that reaches the same result with fewer transitions can reduce power. The presenter compares ripple-carry and look-ahead-carry adders as examples of architectures with different switching behavior.
• Reduce load capacitance, (C_L). The example lowers the load from 0.5 pF to 0.1 pF and observes a substantial reduction in calculated power. Capacitance can include contributions from downstream devices and interconnect.
• Use efficient layout and wiring. Longer interconnects add capacitance, so an efficient physical layout can help reduce load capacitance and power.
• Account for the speed–power trade-off. Increasing inverter transistor sizes can improve speed but also increases power consumption.
• Consider supply voltage. Lowering (V_{DD}) can reduce power, though this must be balanced against performance requirements.
• These are introductory techniques; more advanced power-reduction methods also exist.

The episode closes by previewing the next stage of the project: learning about layout-related layers and concepts before beginning the layout process.

Speakers and Sources

• Speaker: One presenter/host speaks throughout the video. No other speakers are identifiable in the subtitles.
• Tools and sources referenced: Xschem and ngspice. The presenter also refers to an ngspice manual, power-theory material, interview tutorials, and a book shown during the explanation. The book’s title is not identifiable from the subtitles.